ACTION CONTROL SYSTEM FOR PARITY CHECK CIRCUIT

摘要

PURPOSE:To shorten the access time of data by detecting the addresses of the data containing a parity and the data containing no parity at the input side to suppress the data containing no parity at the input side and producing no parity. CONSTITUTION:The addresses of an address line 31 of a a processor 1 are applied to an external register 50, a microcomputer 60 and a memory 70. Then the data on an input data line 32 and a parity line 33 given from each external device and a parity are supplied to an input register 5 of the processor 1. While comparators 3a and 3b of the processor 1 compare the values of address registers 2a and 2b for upper and lower limit values with the input addresses and apply the results of comparison to an AND circuit 6 and a selector circuit 9 respectively. The parity of the register 5 is checked by a parity checker 6 and these checking results are applied to circuits 6 and 9. These circuits 6 and 9 are controlled by the signal obtained when no parity produced by the output of a NAND circuit 4. Then the data containing no parity is suppressed at the input side.