| 摘要 |
PURPOSE:To obtain an inexpensive semiconductor memory device having high performance and the high integration of memory by adding a latch circuit to a level converting circuit. CONSTITUTION:A CML level inputted to an input terminal 1 is converted into an ECL level by an input level converting circuit 11. The output of an input latch circuit 12 operating by a clock input 42 for an input latch circuit is sent to a semiconductor memory circuit element group 21 to be the input of the memory element. The semiconductor memory circuit element group 21 constitutes a large capacity memory connecting plural memory elements operating by the ECL level. The output of the semiconductor memory circuit element group 21 is inputted to an output section latch circuit 32 operating by a clock input 43 for an output latch circuit. The output of the output section latch circuit 32 is converted into a CML level by a level converting circuit 31 converting in level from the ECL level to the CML level and outputted from an output terminal 2. A writing timing pulse input 41 is converted in level and fed to the semiconductor memory circuit element group 21. |
