发明名称 NON-INTERLACED DOUBLE HORIZONTAL SCAN DEFLECTION PLL CIRCUIT
摘要 In a synchronized digital horizontal deflection system operating at 2xfH, a digital phase-lock-loop circuit generates first fH rate signal that is synchronized to the horizontal sync pulses, and a second fH rate second signal that is delayed from the first signal by one-half of the period H. A digital phase-control-loop circuit receives the first and second signals and generates a horizontal deflection control signal at 2xfH rate that controls the retrace interval timing in a deflection circuit output stage. The synchronization of every other retrace interval occur in accordance with information provided by the first signal.
申请公布号 AU5520586(A) 申请公布日期 1986.10.09
申请号 AU19860055205 申请日期 1986.03.25
申请人 RCA CORP. 发明人 DONALD HENRY WILLIS
分类号 H04N3/16;H04N3/27;H04N5/06;H04N5/12;H04N7/01 主分类号 H04N3/16
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