发明名称 MEMORY CIRCUIT
摘要 PURPOSE:To prevent the deterioration of VT by a hot electron and to inprove reliability by having plural MOSTs connecting an input and output buses and a digit line and making the conductive direction of MOST only one direction. CONSTITUTION:An internal signal generating section 21 forms internal signals phi11, phi12 by an inverter I and MOSTQ20, Q21. These MOSTQ20, Q21 gates are connected to a line address A1 and drains are respectively connected to input and output buses I/O through an input and output buses I/O and an inverter I/O. During a reading operation, since the input and output buses I/O are high potential, the internal signal 11 is supplied and only the MOSTQ10 is conductive. During a writing operation, if the input and output buses I/O are high potential by a writing information, the internal signal phi11 is supplied and the MOSTQ10 is conductive and if the bus is low potential, the internal signal phi12 is supplied and only the MOSTQ11 is conductive. Namely, the MOSTQ10, Q11 are conductive only in one direction and the direction of an electric current flowing is fixed.
申请公布号 JPS61227290(A) 申请公布日期 1986.10.09
申请号 JP19850069327 申请日期 1985.04.02
申请人 NEC CORP 发明人 KOISHI KEIJI
分类号 G11C11/34 主分类号 G11C11/34
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