发明名称 SIMULATION CONTROL METHOD FOR LOGIC CIRCUIT
摘要 PURPOSE:To improve a simulation speed by setting and observing directly the condition value in the logical simulation for a logic circuit provided with a scanning pass. CONSTITUTION:A judging box 11 decides whether or not the object logical element exists at the simulation table. When it exists, the operation of the processing box or below is repeated, and when it does not exist, a processing box 12 observes the result of the simulation. In case of the circuit to adopt the scanning pass system, an F/F, of the logic circuit and the condition of the register are directly observed through a serial shift register channel. Here, without simulating the action of the serial shift register, observation is executed, and therefore, the wide simulation speed can be improved.
申请公布号 JPS61226844(A) 申请公布日期 1986.10.08
申请号 JP19850064973 申请日期 1985.03.30
申请人 NEC CORP 发明人 FUNATSU SHIGEHIRO
分类号 G06F11/22;G01R31/3183;G01R31/3185;G06F11/25;G06F17/50 主分类号 G06F11/22
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