发明名称 ISOLATING METHOD BETWEEN ELEMENTS FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To isolate elements required for improving the performance of an ultra LSI by positioning a formation region for an ion implantation layer in an opening in an silicon nitride film and specifying the formation region to a section separate from the end edge of the opening. CONSTITUTION:An silicon oxide film 3 and an silicon nitride film 2 are formed to an silicon substrate 1, and the silicon nitride film 2 is patterned while using a resit 6 as a mask. An applied film 7 mainly comprising silanol is shaped as the resists 6 are left as they are. The silanol film film 7 is converted into an silicon dioxide film through heat treatment, and the silicon dioxide film formed is shaped thickly on side wall sections, and thinned toward the central sections of openings. When the ions of an impurity having the same conduction type as the semiconductor substrate 1 are implanted through the openings, the extension of ion implantation layers 4 to active regions is inhibited. The silicon nitride film 2 is used as an antioxidizing film, selective oxidation is executed, and selective oxidizing layers 5 and channel stopper regions 4 only just under the layers 5 are shaped.
申请公布号 JPS61226942(A) 申请公布日期 1986.10.08
申请号 JP19850068727 申请日期 1985.04.01
申请人 MATSUSHITA ELECTRONICS CORP 发明人 TAKEBAYASHI TAKAMICHI
分类号 H01L21/76;H01L21/316;H01L21/762;H01L29/06;(IPC1-7):H01L21/76 主分类号 H01L21/76
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