| 摘要 |
<p>A signal clamping and sampling circuit wherein signals to be sampled are applied to a voltage amplifier (52). The output of the voltage amplifier is coupled in common to the inputs of first (53) and second (57) matched operational transconductance amplifiers (OTA's). During an initial clamping reference interval, the first (53) OTA conducts to form a feedbacks clamping network for establishing input and output reference bias conditions for the voltage amplifier. The second (57) OTA conducts during a subsequent sampling interval for processing signals to be sampled. The output reference bias of the voltage amplifier determines substantially identical input bias conditions for both the first and second OTA's, thereby significantly reducing the likelihood of signal processing offset errors being produced as between the clamping and sampling intervals when the first and second OTA's are respectively conductive. A level shifting network may be used for applying the signals to the voltage amplifier for providing signals compatible with the input requirements of the amplifier.</p> |
