发明名称 PICTURE DEFECT CORRECTION TIMING CIRCUIT FOR SOLID-STATE IMAGE PICKUP ELEMENT
摘要 PURPOSE:To output a timing signal corresponding to a defective picture element position by storing a horizontal address by a horizontal address storage means and a vertical address by a vertical address storage means to use the same address storage means. CONSTITUTION:The address is assigned not in the unit of a frame but in the unit of a field. A coincidence signal of a vertical address comparator 35 is outputted when the 3rd line is scanned. In the case of the field B, since the level of the output signal of an AND circuit 46 is brought into 0 level by a field display signal FI, the coincidence signal from a vertical address comparator 35 is fed to an AND circuit 44 via a multiplexer 43. In the case of the field, A, when the field display signal FI is brought to level 1, since the storage content of a field identification bit memory 47 is brought to level 1 in advance, the output signal of the AND circuit 46 is brought to level 1 and the multiplexer 43 selects the coincidence signal delayed at a signal delay circuit 41 by the horizontal period.
申请公布号 JPS61225981(A) 申请公布日期 1986.10.07
申请号 JP19850066873 申请日期 1985.03.30
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 OZEKI ATSUSHI
分类号 H04N5/217;H04N5/335;H04N5/367;H04N5/378 主分类号 H04N5/217
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