| 摘要 |
PURPOSE:To form three kinds of reference signals for detecting SAT by providing a pulse inserting/extracting circuit forming a signal inserted with one pulse, a signal extracted by one pulse and a signal without any pulse insertion/ extraction at each period when an output signal of a frequency division counter is obtained. CONSTITUTION:A prescribed number of pulses a counted by a frequency division counter 2, from which a signal is outputted at each count. The pulse inserting/ extracting circuit 4 forms three kinds of signals, a signal inserted by one pulse, a signal extracted by one pulse, and a signal without any pulse insertion/ extraction at each prescribed time by means of the logical processing between an output signal of a frequency division circuit 1 and an output signal of a delay circuit 3. The three kinds of signals having frequencies of F(m+1)/m, F(m-1)/m are formed and outputted from the circuit 4, where (m) is a prescribed number of the counter 2 and F is a frequency of a master clock, they are selected by an identification code and become a reference signal for a digital phase synchronizing signal. Thus, whether or not a signal is a 3-frequency tone signal is identified easily. |
