发明名称 TIMING REPRODUCING DEVICE
摘要 PURPOSE:To facilitate correct timing reproduction by allowing a timing reproducing circuit to adjust the phase and frequency of an output of a clock source for timing reproduction at the slave side and reproducing the timing signal for master side only when a trainning signal is inputted. CONSTITUTION:A signal sent from the master side 1 is received by a slave side 2, phase information and frequency information are extracted from the signal and used for recovery of the timing signal. Then the signal synchronously with the reproduced timing signal is set to the master side 1. Then the master side adjusts the deviation of the phase caused in the reception signal due to the transmission characteristic of the transmission line to reproduce the timing signal of the master side. Thus, the circuit scale of the master side 1 is reduced and even if noise is mixed, the timing reproduction is attained effectively and efficiently, and since no residual echo effect exists, correct timing reproduction is obtained.
申请公布号 JPS61224530(A) 申请公布日期 1986.10.06
申请号 JP19850064371 申请日期 1985.03.28
申请人 FUJITSU LTD 发明人 FUKUDA SETSU;TSUDA TOSHITAKA;MURANO KAZUO
分类号 H04L7/10;H04L5/14 主分类号 H04L7/10
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