发明名称 VOLTAGE COMPARISON CIRCUIT
摘要 PURPOSE:To improve linearity, to keep high accuracy and to protect surely an ECL line receiver by providing a differential amplifier using a high frequency FET, a level shift circuit and the ECL line receiver. CONSTITUTION:A measuring signal Vin1 from a circuit to be measured is fed to a gate of an FET Q1 and a reference voltage Vin2 is fed to a gate of an FET Q2. Since the FETs Q1, Q2 are connected in cascade with the FETs Q3, Q4, the deterioration of the high frequency characteristic by the Miller's effect is prevented. The output of the differential amplifier 3 is inputted to the emitter of FETs Q7, Q8 of the level shift circuit 4 as currents IE1, IE2, the differential voltage DELTAV0 is outputed from the collector and fed to a differential input of the ECL line receiver 5. Since the receiver 5 has 7 10 times of differential voltage gain per stage, the required gain as the voltage comparison circuit is obtained by connecting two or 3 receives in cascade. Further, a feedback circuit 6 prevents a positive voltage from being applied to protect the circuit.
申请公布号 JPS61224720(A) 申请公布日期 1986.10.06
申请号 JP19850065835 申请日期 1985.03.29
申请人 YOKOGAWA ELECTRIC CORP 发明人 IMAMURA MAKOTO;YAMAGUCHI YUJI;NEMOTO HISAKATSU
分类号 H03K5/08;H03K5/24;H03K19/0185 主分类号 H03K5/08
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