| 摘要 |
PURPOSE:To attain miniaturization and also to allow the titled circuit to be operated in high speed even with a high load capacitance by connecting bipolar transistors (TRs) in a form of so-called totempole type so as to constitute an output stage of the circuit and providing a control section consisting of MOS TRs. CONSTITUTION:An output section 7 consists of NPN bipolar TRs 31 (1st NPN) and 33 (2nd NPN) connected in a form of so-called totempole type. A base terminal of the 1st NPN TR 31 is connected to a drain terminal of a PMOS 21 and a NMOS 23 of a drive section 3 and a drive signal C is applied through the connection. Further, a base terminal of the 2nd NPN TR 33 is connected to drain terminals of NMOS 27, 29 of the selection section 5. In this circuit, with a tri-state signal T at 'H' level and a tri-state inverted signal of T at 'L' level as shown in table 2, the output has a high impedance state, and with the tri-state signal of T at 'L' level and the tri-state inverted signal T at 'H' level, the circuit acts like a conventional buffer circuit.
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