发明名称 LOOPBACK TEST DETECTION/TRANSFER CIRCUIT IN LOOP SYSTEM DATA TRANSMISSION SYSTEM
摘要 <p>PURPOSE:To prevent the test condition from continuing limitlessly even when any station in a loop does not give a loopback test indication by using a indication from a comparison/selection circuit so as to bring a test bit into a non-test state for a prescribed time at a prescribed period, and correcting the test bit into the original test state from the non-test state. CONSTITUTION:When a modified test bit comes from a detection circuit 23 not during the loopback test, a comparison/selection circuit 25 references a signal '0' from a switch state storage circuit 24 and discriminates that the detected test bit is an incorrect test bit generated at the leading of the system, issues a correction indication to a test bit correction circuit 26 and a indication as it is to a test bit modifying circuit 27 respectively. The test bit correction circuit 26, based on the said indication, brings the non-test state of the test bit into the original test state. Thus, a loop synchronous control station 1 is not brought into the test state by the incorrect test bit.</p>
申请公布号 JPS61224524(A) 申请公布日期 1986.10.06
申请号 JP19850063295 申请日期 1985.03.29
申请人 NEC CORP 发明人 USUKI SHIGERU
分类号 H04B3/46 主分类号 H04B3/46
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