| 摘要 |
PURPOSE:To shorten delay time and to suppress the excessive transient current of a logic circuit, by a method wherein a resistor to be connected to the base CONSTITUTION:A resistor R2 is formed in a resistor forming region 3, and a resistor R1 is formed in a transistor QZ forming region 2. The collector of the transistor QZ and the base of a transistor QA are connected according to parasitic capacitance C arised according to formation of the resistor R1 in the QZ forming region 2. According to the pull-down circuit thereof, when output becomes to 'H' from 'L', namely when the QZ is changed from ON over OFF, a step pulse having steep building-up to be formed according to the pull-up circuit is applied to the base of the active pull-down transistor through the above-mentioned capacitance from the collector of an output transistor, and making the OFF of the output transistor can be attained rapidly. |
