| 摘要 |
PURPOSE:To decrease the procedures of conversion and to increase the address speed by providing an effective bit to the head address data of each table to show whether the relevant table is set on a main memory or not. CONSTITUTION:The read data 28 given from a main memory 3 is set to a register 17, and the output 23 of the register 17 is delivered to a processor 1. A selector 15 is provided within an address conversion mechanism 2 for address conversion. A control part 19 controls the procedures of address conversion in a hit mode of a high-speed conversion buffer TLB and a miss mode of the TLB together with the control in a space access mode, the purge control of a TLB12 and the rewriting control of origin registers 13 and 14 for user and system segment tables respectively. Here an effective bit is provided to the head address data of each table to show whether the relevant table is set on the main memory 3 or not. Thus each table can be converted into a virtual form.
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