发明名称 LOGIC CIRCUIT
摘要 PURPOSE:To discharge quickly lots of electric charges stored in a load capacitor or the like being a parasitic capacitor at an output by fitting directly an input transistor (TR) and the 1st reference TR to the output. CONSTITUTION:In the 1st output, >=1 input TRs Q1, Q2, Q3 are fitted and in the 2nd output, the 1st reference TR Q4 is fitted and a full logical amplitude is imposed onto their bases. When the potential of the 1st output terminal O1 changes from a Vh to a Vl, since the electric charge stored in the load capacitor is discharged by input TRs Q1, Q2, Q3 in which the full logical amplitude being Vh-Vl is utilized, the potential is changed quickly. Similarly, the operation above is executed by connecting the 2nd output to the 1st reference TR Q4.
申请公布号 JPS61222319(A) 申请公布日期 1986.10.02
申请号 JP19850065705 申请日期 1985.03.27
申请人 MITSUBISHI ELECTRIC CORP 发明人 NISHIMURA TAKASHI
分类号 H03K19/013;H03K19/086 主分类号 H03K19/013
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