发明名称 POWER-ON RESET CIRCUIT
摘要 PURPOSE:To generate a reset signal even when the leading of a power supply is slow by connecting an element which is turned on and then causes a prescribed voltage drop with a power supply rising to a voltage and a capacitor generating a reset signal in series between power supplies. CONSTITUTION:A MOS transistor (TR) Q5 turned on when the power supply rises to a voltage and causing a prescribed voltage drop further, a resistor R and a capacitor C are connected in series between power supplies. When a power supply voltage Vcc reaches the threshold value Vth of the TR Q5 at application of power, the TR Q5 is turned on and the capacitor C is charged through the resistor R. When a voltage VA exceeds the threshold voltage of an inverter I1, a TR Q1 is turned off, a TR Q2 is turned on and a voltage VB goes to an L level, then a TR Q3 is turned on, a TR Q4 is turned off and a voltage Vc at an output terminal C goes to an H level in an inverter I2, but the voltage Vc is at L level until that time and the voltage Vc being at an L level becomes a reset signal.
申请公布号 JPS61222318(A) 申请公布日期 1986.10.02
申请号 JP19850062533 申请日期 1985.03.27
申请人 FUJITSU LTD 发明人 SAITO TADAHIRO;GOTO KUNIHIKO;HASEGAWA SEIICHI
分类号 H03K17/22 主分类号 H03K17/22
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