| 摘要 |
PURPOSE:To obtain stable CMOS differential amplifiers without damaging the responding speed against the variation of transistor capability in the manufacturing process, by inputting an activating signal in a gate terminal and connecting the 6th MOS transistor, whose conductive channel is different from those of the 1st-3rd MOS transistors, between drain terminals of the 4th and 5th MOS transistors. CONSTITUTION:When an activating signal (phi) is 'H' level and a CMOS differential amplifier is activated, the amplifier has a differential amplifying function as conventional ones have, since a P-channel MOS transistor Q16 is in its 'OFF' condition. When the activating signal (phi) is 'L' level and the CMOS differential amplifier is inactivated, the P-channel MOS transistor Q16 is set to its 'ON' condition. Therefore, a node N and output signal OUT are maintained at equal potential even when a difference exists between the transistor capabilities between P-channel MOS transistors Q11 and Q12 and N-channel MOS transistors Q13 and Q14. Therefore, if the activating signal (phi) is changed from the 'L' level to the 'H' level and the differential amplifying operation of the amplifier is started at times t1 and t2, the responding speed is not delayed, because the node N and output signal OUT always change from the equal potential.
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