PHASE LOCKED LOOP WITH IMPROVED LOCK-IN

摘要

PLL with fast lock-in pull-in range uses a logic circuit to detect beats between outputs of an in-phase detector and phase quadrature detector. It determines whethr an incoming frequency is within the normal 'lock-in' range of a PLL VCO or not, and whether it is higher or lower than the VCO frequency. If not within normal range, the beats are rectified and gated to provide a DC control voltage of the proper value and polarity for locking the oscillator on the incoming frequency.