| 摘要 |
<p>PURPOSE:To relieve a faulty ROM almost without a delay of an access time with a slight increase of a chip by AND processing a faulty line and a faulty column and controlling a reverse of a reading data. CONSTITUTION:A line and a column of a ROM array is selected by a line decoder 1 and a column decoder 2, and then, during a corresponding faulty ROM cell being present, faulty lines and faulty columns in faulty line detecting circuits 101-10n, and faulty column detecting circuits 111-11n in which faults are registered are detected. When a faulty ROM cell is present in the selected line and the column, detected outputs in the circuits 101-10n, 111-11n are re versed to H. These H outputs are processed in an AND circuit 12, an exclusive OR circuit 13 is controlled, and a reading output through a sense amplifier 5 from the faulty ROM cell selected in the faulty lines and the faulty columns is reversed. Thus, a chip size is not increased, an access time is not substantially delayed but the faulty ROM cell can be relieved.</p> |
