| 摘要 |
PURPOSE:To facilitate data transfer between a computer and an analyzing device by generating a chip select and a data select signal for the data transfer on the basis of an address assignment and a data transfer start signal at the time of the data transfer. CONSTITUTION:Data and a control signal from an interface bus are received by bus drivers 1 and 2 and inputted to an interface control circuit 5 where a primary address is set with an address setting switch 14. An in-device secondary address is determined by a secondary address storage memory 3 and a storage memory for the number of transfer bytes is accessed correspondingly. A data selecting circuit 8 receives the data transfer start signal and a TLKBSY, a LSNBSY, and an ANT signal from from a handshake control circuit 7 and gives each transfer data an index of the number of bytes. |
