发明名称 BUS CONTROL SYSTEM
摘要 PURPOSE:To improve the using efficiency of a local bus by securing the control where an input/output processor gives up the using right of an adaptor bus when it acquires this using right and then acquires again said right when it receives the read data from a main memory. CONSTITUTION:A system bus 50 is used for connection among a main memory 10, a central processor 20 and an input/output processor 30. While a local bus 60 connects the processor 30 to adaptors 41-4N. These adaptors 41-4N acquire the using right of the bus 60 when an access is given to the memory 10 and then give up this right after informing the adaptor recognition information to the processor 30. While the processor 30 gives an access to the memory 10 by means of the access information after acquiring the using right of the bus 50 and conforms the acquisition of the answer information of the memory 10. At the same time, the controller 30 sends the adaptor recognition information and the answer information onto the bus 60 after acquiring the using right of the bus 60. Thus the fine control is given to the exclusive time of the bus 60 and the using efficiency of the bus 60 is improved.
申请公布号 JPS61214049(A) 申请公布日期 1986.09.22
申请号 JP19850057318 申请日期 1985.03.20
申请人 NEC CORP 发明人 OTAKE AKITO
分类号 G06F13/36;G06F13/40 主分类号 G06F13/36
代理机构 代理人
主权项
地址