发明名称 TRANSFER SYSTEM FOR BIT PARALLEL DATA
摘要 PURPOSE:To increase the transfer speed of a data signal by constituting the titled system so that a receiving-side device executes read of receiving data, when a rise of ready signal sent from a transmitting-side video has been detected, and also a completion signal is sent out to the transmitting side device, as soon as the read is completed. CONSTITUTION:A digital output part 3 sends out a ready signal together with a bit parallel data signal. An interrupting part 5 of a receiving side executes an interruption program of an MPU 2 by detecting a rise of this ready signal. As a result, a digital input part 4 executes exactly read of the bit parallel data signal, and sends a completion signal to an MPU interrupting part 7 of a transmitting side from a digital output part 6, as soon as its execution is completed. The interruption part 7 of the transmitting side executes an interruption to an MPU 1 immediately when the completion signal is detected, and the next data transfer program can be executed.
申请公布号 JPS61212142(A) 申请公布日期 1986.09.20
申请号 JP19850051879 申请日期 1985.03.15
申请人 FUJITSU LTD 发明人 KANEJIMA HISAKIMI
分类号 H04L29/08;H04L13/00 主分类号 H04L29/08
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