| 摘要 |
PURPOSE:To provide a circuit in which peripheral circuits can be integrated and a color difference signal is low in noise by alternately sampling two color difference signals, adding them together, delaying them in a sole delay line and again sampling the delayed signals. CONSTITUTION:Two color difference signals inputted to input terminals 1, 2 are alternately sampled by sampling circuits 3, 4 respectively and added together in an adder 5 to produce a time sharing multiplexed signal. The output signals from the circuit 5 are transferred by a CCD constituting a 1H delay circuit 6, again sampled in sample and hold circuits 7, 8 and turned into two color difference signals delayed 1H. The output signals from the circuit 7, 8 are added to the undelayed color difference signals in adders 9, 10, limited in bandwidth by LPFs 11, 12 and outputted to output terminals 13, 14.
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