| 摘要 |
PURPOSE:To prolong a minimum inverting interval and to decrease maximum inverting interval by converting a 4-bit data word into an 8-bit channel word according to the prescribed rule. CONSTITUTION:A latch circuit 1 stores temporarily inputted sequentially synchronously with a clock CK 1. The coding circuit uses the i-th and (i+1)th data word and the input signal of the lower-order bit of the (i-1)th channel word to generate the i-th channel word. The latch circuit 3 stores temporarily the channel word. The channel word reproduced by a reproducing section 5 is decoded via a latch circuit 6, an FF circuit 7 and a decoding circuit 8.
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