| 摘要 |
PURPOSE:To obtain the protocol verification system with less processing amount by splitting a given protocol specification into plural blocks in the unit of process, generating a state transition diagram at each block so as to detect the specification error. CONSTITUTION:The protocol specification given externally is stored in a memory 1, hierarchy split of the protocol specification is stored in a memory 2 and a variable L representing the level of the block being processing object is stored in a register 3. The block state transition diagram BSTD of each level and the specification error detected as the result of verification are stored in a memory 4 and the presence of executionable reception detected by the BSTD generating processing is represented by a flag at each level, which is stored in a register 5. The protocol specification is split blocks of initial setting 11, BSTD revision 12, checks 13, 15, addition 14, compression 16 and error check 17 in the unit of processes, the block state transition is generated from the state at each process included in the block and the signal series stored in the memory and register so as to verify the protocol specification according to the executionable block transition.
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