| 摘要 |
PURPOSE:To reduce the load of trap processing by specifying a bank of the branch address generating memory of a control storage with a trap processing factor code, and determining a branch address in the bank wit an instruction code. CONSTITUTION:When a trap function in step operation, tracing, etc., is realized by a high-level language machine under microprogram control, the trap processing factor code is supplied from its control bus 107 to a trap processing factor code register 103 and the sequencer 105 in a microprogram type execution control part 1-2 specified a bank of the branch address generating memory 101 which generates a branch address for accessing the control storage 106. An address in the bank is determined with the instruction code supplied from an instruction bus 108 to an instruction code register 104.
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