发明名称 CONTROL CIRCUIT FOR MAGNETIC BUBBLE MEMORY
摘要 PURPOSE:To facilitate the design of a driving circuit, changing the circuit, or designing a user-side host system by detecting the reduction of an input voltage supplied to a bubble memory device and incorporating a voltage holding circuit, which holds a bubble medium driving voltage for a certain time, in the memory device side. CONSTITUTION:A bubble memory control circuit where a voltage holding circuit 5 and a voltage reduction detecting circuit 6 are incorporated in the same device is obtained. Since the voltage holding circuit 5 and the voltage reduction detecting circuit 6 provided conventionally in the host CPU side are incorporated in the side of a bubble memory device 10 to generate a required memory driving voltage, for example, 5V or + or -12V voltage or a power-off predicting RF signal, the device is stopped easily at the operation sequence time for emergency due to power-off or the like, for example, at a certain sequence time of a generator of bubble transfer, a replicator gate, or the like to prevent destruction of stored data.
申请公布号 JPS61204886(A) 申请公布日期 1986.09.10
申请号 JP19850044076 申请日期 1985.03.06
申请人 FUJITSU LTD 发明人 KAMISHIRO KOEI;KANEKO KEIICHI
分类号 G11C11/14;G11C19/08 主分类号 G11C11/14
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