| 摘要 |
<p>A programmable logic device is disclosed which is adapted to isolate the Miller capacitances of erased memory cells from the product terms and to limit the cell current drawn through the product term sense amplifiers. The invention substantially reduces the row switching noise coupled onto the product terms, allows high speed sense amplifier operation, and significantly reduces the power dissipated by the device. In accordance with the invention, the electrically erasable sense transistor M2 for each memory cell is disposed between the cell select transistor M1 and the product term sense amplifier, thereby isolating the Miller. capacitance associated with the select transistor from the sense amplifier when the cell is in the erased (nonconductive) state. Separate product term ground lines 35 are provided for each product term 30. A current limiter connects each product term ground line to ground, and is adapted to limit the current flow through each product term to a predetermined maximum level, typically about the maximum current level which may be passed through one conductive memory cell.</p> |
