发明名称 Masterslice semiconductor device
摘要 A masterslice semiconductor device has two kinds of basic cells including a first one having the same size same as that of ordinary basic cells in a prior art masterslice semiconductor device and a second one having a size larger than that of the first basic cell. A number of the large-sized basic cells are arranged along columns of a semiconductor substrate and constitute a plurality of basic cell arrays which are disposed along rows of the semiconductor substrate. Each of the basic cell arrays of the second basic cells is situated between two adjacent basic cell arrays of the first basic cells. Each of the regions occupied by the basic arrays of the second basic cells can be used for distributing interconnecting lines as in the prior art masterslice semiconductor device. At least one of the second basic cells in each of the regions serves to interconnect the first basic cells in adjacent basic cell arrays, and also provides an elementary circuit block, that is a unit cell, in conjunction with the first basic cells.
申请公布号 US4611236(A) 申请公布日期 1986.09.09
申请号 US19840628316 申请日期 1984.07.06
申请人 FUJITSU LIMITED 发明人 SATO, SHINJI
分类号 H01L27/092;H01L21/82;H01L21/8238;H01L27/118;(IPC1-7):H01L27/10;H01L27/02 主分类号 H01L27/092
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