发明名称 CIRCUIT FOR DISCRIMINATING INPUT LEVEL ORDER
摘要 PURPOSE:To discriminate the input of the 2nd order or below by using the output of plural circuits sampling and holding an instantaneous level so as to bring an active circuit to which the 1st order output is applied into the nonoperating state. CONSTITUTION:An output in response to inputs 1N1-1N3 is fed from an acoustic device 2 during the period when clock pulses CK2-CK4 exist in transfer gates 4-6, the output of sample-and-hold circuits 11-13 is changed, the input D of a latch circuit 27 is changed respectively, a Q output is changed and the Q output of the latch circuit 27 having a maximum signal level goes to a high level. When clock pulses CK6, CK7 are outputted from a controller 7 succeedingly, only the sample-and-hold circuit only corresponding to the maximum input among the circuits 11-13 is reset and the output level of the circuit corresponding to the 2nd largest input is maximized. Thus, the 2nd largest input is discriminated by the Q output of the latch circuit 36.
申请公布号 JPS61203731(A) 申请公布日期 1986.09.09
申请号 JP19850045115 申请日期 1985.03.07
申请人 PIONEER ELECTRONIC CORP 发明人 MOTOHASHI MINORU
分类号 H03K17/00;H04B1/20;H04B7/02 主分类号 H03K17/00
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