发明名称 |
SENSE AMPLIFIER SYSTEM FOR SEMICONDUCTOR MEMORY DEVICE |
摘要 |
PURPOSE:To attain a normal reading action at a high speed and to secure a refresh action in a reading mode by connecting at least one of the 1st and 2nd sense amplifiers to the paired data lines via the 3rd switch circuit. CONSTITUTION:A switch circuit S2 is turned on immediately after a switch circuit S3 is turned off and a pair of bit lines BL2 and -BL2 are connected with a sense amplifier RSA1 for refresh action. Thus a refresh action of a memory cell MC2 is carried out. Then both lines BL2 and -BL2 are precharged and at the same time set at the same potential. Then a word line WL2 is selected and set at the high level and at the same time a dummy work line is set at a high level. Thus a potential difference is produced between the lines BL2 and -BL2 in accordance with the information on the cell MC2. The amplifier RAS1 works when said potential difference reaches a fixed level. Then this potential difference is increased and the potential of the line BL2 is written to the cell MC2.
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申请公布号 |
JPS61202395(A) |
申请公布日期 |
1986.09.08 |
申请号 |
JP19850042354 |
申请日期 |
1985.03.04 |
申请人 |
TOSHIBA CORP |
发明人 |
NOGAMI KAZUTAKA;SAKURAI TAKAYASU |
分类号 |
G11C11/401;G11C11/34;G11C11/403;G11C11/406 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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