发明名称 CONTROL SYSTEM FOR INTER-SEGMENT BRANCH INSTRUCTION
摘要 PURPOSE:To increase the processing speed by transferring the contents of a branch segment number register to a segment number register when a specific branch instruction is executed and branching said contents to a designated address. CONSTITUTION:One of memory segments 2-0, 2-1... provided in the same address area is selected by a segment number register 5, and an access is possible to this selected segment. A branch segment number register 20 is connected to a register 5 via gates 21 and 22. When this code is equal to an inter-segment branch instruction code, an ON signal is delivered to a control line 24. Then the line 24 is turned on when the inter-segment branch instruction is executed and gates 21 and 22 are opened. The contents of registers 5 and 20 are exchanged with each other, and the segment number loaded in the register 20 is replaced with a new segment number needed for memory access.
申请公布号 JPS61202226(A) 申请公布日期 1986.09.08
申请号 JP19850043403 申请日期 1985.03.05
申请人 FUJITSU LTD 发明人 AKIMOTO ISAO
分类号 G06F12/06;G06F9/32 主分类号 G06F12/06
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