| 摘要 |
<p>PURPOSE:To control the hardware at a high speed by defining a partial program area of a processor as a no-operation instruction and deciding the address of the no-operation instruction by an address decoding circuit for production of a hardware control signal. CONSTITUTION:An address decoding circuit 2 is connected to a processor 1 via an address bus 3 and a control/data bus 4. The processor 1 functions to execute a program which defines a partial program area of the processor 1 as a no-operation NOP instruction. Then the program executed by the processor 1 is supplied to the circuit 2 via the bus 3. The circuit 2 decodes the addresses for each NOP instruction for production of a prescribed hardware control signal and delivers this signal to a hardware control signal line 5.</p> |
