| 摘要 |
PURPOSE:To process the multi-dimensional images at a high speed by providing a decoder which rearranges in response to each matrix size of a 3-dimensional memory as well as the generators for three read and write addresses X, Y and Z respectively which are independent of each other. CONSTITUTION:Read address generators 1-9 are provided together with a write address generator 10, and multiplexers 11-13 are added to select and deliver the designated one of those address signals sent from said address generators together with a decoder 14 which rearranges the address bits of X, Y and Z according to the matrix size of a 3-dimensional memory. Then the Mat generators 4-6 of X, Y and Z directions are controlled to address optionally the changing components of matrices of X, Y and Z based on the output addresses of address generators 1-3 of X, Y and Z directions. Thus it is possible to segment images as well as the image processing on the 3-dimensional memory.
|
