| 摘要 |
PURPOSE:To test the function of an instruction sequence in a ROM by a customer's program by providing a means for ignoring a branch instruction, a skip instruction, and a data setting instruction to a memory which are read out of the ROM. CONSTITUTION:The customer's program stored in the ROM 1 is sent out to an instruction decoder 5 successively from the address '0' and a microcomputer operates. In this case, when the branch instruction is sent out of the ROM 1 to the decoder 5, a branch instruction inhibiting signal S5 is outputted and this instruction is ignored by an AND gate 9. Further, when the skip instruction is sent from the ROM 1 to the decoder 5, a skip instruction inhibiting signal S7 is outputted and a judging signal S3 is ignored. Therefore, even when the customer's program has a loop, the loop is ignored and instructions of the program stored in the ROM 1 are executed from the address '0' to the final address. |
