| 摘要 |
PURPOSE:To attain switching of lots of kinds of operation modes by providing an input circuit composing of a voltage level detection circuit and an operation mode selection circuit to the pre-stage of a semiconductor so as not to expand an external input terminal. CONSTITUTION:Internal signals phi1, phi2 are generated by an external input signal phi0. A MOS transistor (TR) Q2 and resistor R2, and a TR Q3 and a resistor R3 are an internal clock generating section composing of two stages of inverters, and when the level of a node N1 reaches a high level sufficient for turning on the MOS TR Q2, the level of phi2 goes to 'H'. The MOS TR Q1 consists generally of plural TRs and the sum VT of the threshold voltages is set to a value higher than a power supply voltage Vcc(VT>Vcc). When phi0<VT, the MOS TR Q1 is turned off and the level of the node N1 is zero V. When phi0>=VT, the TR Q1 is turned on and when the level of the node N1 reaches a sufficiently high level to turn on the MOS TR Q2, the relation of phi2='H' is obtained.
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