发明名称 SYSTEM FOR CONTROLLING SENDING OF TRANSMISSION POWER
摘要 PURPOSE:To avoid disturbance to communication of other station by, e.g., duplicating a burst gate sending circuit and sending transmission power only when outputs of the circuits are coincident so as not to send the transmission power when burst gate signals are dissident due to a fault of a TDMA device. CONSTITUTION:Burst gate signals from the 1st burst gate sending circuit 9 and the 2nd burst gate sending circuit 10 are fed to a detection circuit 11, where whether or not the two burst gate signals are coincident is detected. When they are coincident, the burst gate signal controls the transmission time of the transmission power of a transmission section via a drive section 8. When the burst gate signals are dissident, the burst gate signal inputted from the 1st and 2nd burst gate sending circuits are fed to an AND circuit 16 via an NOR circuit 12, an exclusive OR circuit 13 and a JK flip-flop circuit 4. Three input signals are ANDed and the result is outputted externally from a terminal OUT, but since the two burst gate signals re dissident, the output is zero and no transmission power is sent.
申请公布号 JPS61198832(A) 申请公布日期 1986.09.03
申请号 JP19850037990 申请日期 1985.02.27
申请人 FUJITSU LTD 发明人 MORITA OSAMU;YAKURA TAKESHI
分类号 H04J3/00;H04B7/15;H04B7/24 主分类号 H04J3/00
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