| 摘要 |
PURPOSE:To attain high speed A/D conversion by providing plural circuit blocks each having an adder means including a capacitor and a switch and a comparator means and inputting the result of addition of the pre-stag to the circuit block of the next stage. CONSTITUTION:An input signal X is inputted to an addition section of a block 100 and compared with 0V at a comparison section. An output of the comparison section comprising a comparator 23 and a flip-flop 24 is sent to a binary code generating circuit 5. An output of the adder section of the block 100 is inputted to a block 200, where a reference voltage Vref is added or subtracted and the result is compared with 0V. The comparator output is sent to the circuit 5. The adder section comprises a capacitor (c), switches phi1, phi2, phi10 and phi20 and an operational amplifier 1000. The switches phi1-phi20 are switched by using clocks phi1-phi20. The A/D conversion time is decided by the response time of each block and block number.
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