发明名称 MANUFACTURE OF MOS-TYPE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To prevent reduction of the mobility of the carrier at the channel portion of a MOS transistor by implanting inactive atoms into a semiconductor substrate of one conductivity type, thereby increasing the withstanding voltage between the source and drain diffusion layers and the substrate while maintaining punch through resistance. CONSTITUTION:A gate electrode 104 is formed of polycrystalline silicon on a gate insulating film 103, with a mask material 106 and the gate electrode 104 as a mask inactive atoms such as Ne, Ar, Kr or Xe are ion-implanted into a part of the device area to form an implantation layer 105, high-temperature annealing is performed, and with a device isolation insulating film 102 and the gate electrode 104 as a mask atoms of the conductivity type opposite to the substrate 101 are ion-implanted to form a source diffusion layer and a drain diffusion layer 107. While punch through resistance is maintained, reduction of the withstanding voltage between the substrate and the source diffusion layer and the drain diffusion layer and reduction of the mobility of the carrier at the channel portion of a MOS transistor, which are defects of the conventional device, are improved, thereby reducing hot electrons which are implanted into the gate oxide film.
申请公布号 JPS61198681(A) 申请公布日期 1986.09.03
申请号 JP19850037861 申请日期 1985.02.27
申请人 NEC CORP 发明人 NAKADA HIDETOSHI
分类号 H01L29/78;H01L29/06;H01L29/08;H01L29/167 主分类号 H01L29/78
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