发明名称 PLL modulation circuit
摘要 A phase-locked loop modulation circuit, such as may be used for a data communications purposes, in which undesired level variations are eliminated by employing d.c. coupling entirely. The circuit includes a level converter circuit which converts a logic signal into a signal having substantially equal levels above and below a predetermined voltage, a voltage-controlled oscillator, and a circuit for superposing the signal having substantially equal levels on a control voltage of the voltage-controlled oscillator so that the output of the voltage-controlled oscillator is subjected to angular modulation. In accordance with the invention, the level converter circuit includes a pair of voltage dividing resistors which divide the supply voltage, a pair of series circuit each composed of a resistor and a switch element connected in parallel with each of the series circuits being connected in parallel to a respective one of the pair of voltage dividing resistors, and a gating circuit for complementarily operating the switch elements on and off in accordance with the logic outputs signal.
申请公布号 US4609886(A) 申请公布日期 1986.09.02
申请号 US19850715308 申请日期 1985.03.25
申请人 PIONEER ELECTRONIC CORPORATION 发明人 TAKAKI, HISASHI;MATSUSHITA, FUMIO
分类号 H03C3/09;H03L7/06;H04L27/12;(IPC1-7):H03C3/00 主分类号 H03C3/09
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