| 摘要 |
PURPOSE:To contrive the prevention of latch-up by including the first reverse conductivity type region connected to an external terminal and the second reverse conductivity type region connected to a power source terminal. CONSTITUTION:An N type region 25, a P type region 26, and an N type region 27 constitute a transistor Q2 as the collector, base, and emitter, respectively. The N type region 25 is connected to an output terminal 24 via electrode 28 made of a wiring layer. A region 29 is N type and is connected to the power source terminal VDD via electrode 30 made of a wiring layer. The N type region 25 corresponds to the first region formed on one main surface of the semiconductor substrate, and the N type region 29 to the second region formed on the main surface of the substrate. When a noise signal much lower than at the GND level is impressed on the output terminal 24, most part of noise current flows by making the region 29 as the collector in the presence of this region 29 between the region 25 and the CMOS transistor, and gives no influence as the trigger current for latch-up on the part of the CMOS transistor. |
