发明名称 VECTOR PROCESSOR
摘要 PURPOSE:To speed up transferring an entire collection of data elements each consisting of a constant number of words and being in store in the main memory at a regular address interval onto a vector register by calculating sequential addresses. CONSTITUTION:Let the array data stored in memory 5 be a1, and given positive integers p, f and s. Then, the calculation is executed by selecting elements of array data a1 as element group (a0, ap, a2p,...a(q-1)p), followed by element group (as, as+p, as+2p,...as+(q-1)p), and further followed by element group (a2s, a2s-p, 22s-sp,...a2s+(q-1)p)..., and by referring to the entire element groups as the vestor data having a vector length of N. Further, prepare a register group consisting of the register for specifying p, the counter for counting of, the register for specifying s, and the register for specifying vector length N, and use the contents of these registers to read elements aj of array data a, to be subjected to reference from the main memory and write them on the vector register.
申请公布号 JPS61196371(A) 申请公布日期 1986.08.30
申请号 JP19850036352 申请日期 1985.02.27
申请人 HITACHI LTD 发明人 NAGABORI FUMIKO;USHIRO YASUNORI;MURAYAMA HIROSHI
分类号 G06F9/38;G06F15/78;G06F17/16 主分类号 G06F9/38
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