| 摘要 |
PURPOSE:To contrive a higher speed testing, by attaching registers storing the subsequent test data respectively to a plurality of units so as to transfer the subsequent test data to the units simultaneously from the registers by a command from a central control section. CONSTITUTION:Registers R (R1, R2... and RN) are attached to respective units U (1,2...and N) so as to store test data into the registers previously before they enter the units U. Then, while an IC is being tested using test data for the first test items stored in the respective units U, test data for the second test items are stored into the respective registers R by a command of the CPU11. Then, upon the end of the testing for the fist test items, an ON command is provided to a gate register GR from the CPU11 to transfer test data for the second test items to the respective units U simultaneously from the respective registers R and thus, the speeding up of the test can be realized.
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