发明名称 BUFFER MEMORY DEVICE
摘要 PURPOSE:To prevent the increase in the distortion of the writing clock by completing forcibly the receiving enable signal to the end of the receiving clock and adding the clock in order to write the inactive part of the receiving enable signal. CONSTITUTION:A receiving enable signal reconstituting circuit 1,000 composed of a retriggerable monostable multivibrator 100, an inverting circuit 10, a flip- flop 300 an AND circuit 30 and an OR circuit 50 reconstitutes the receiving enable signal from a receiving clock 3 and a receiving enable signal 2, and supplies to a buffer memory 600. A writing clock applying circuit 2,000 composed of a delaying circuit 200, an inverting circuit 20, a flip-flop circuits 400 and 500 and an AND circuit 40 applies one writing clock from the receiving clock 3, and supplies to the buffer memory 600, and therefore, it is not necessary to mind the time relation of the final part of the receiving signal.
申请公布号 JPS61196327(A) 申请公布日期 1986.08.30
申请号 JP19850037872 申请日期 1985.02.27
申请人 NEC CORP 发明人 KAWATOKO TSURAYUKI
分类号 H04L13/08;G06F5/06 主分类号 H04L13/08
代理机构 代理人
主权项
地址