发明名称 PHASE PULL-IN CIRCUIT
摘要 PURPOSE:To execute the instantaneous pull-in of the phase by executing the initial resetting of the frequency dividing circuit to divide the output signal of a voltage control oscillating device VCO, synchronizing forcibly the frequency dividing signal output signal to a reference signal and executing the phase synchronization of two input signals of the phase comparing circuit, by the edge of a reference signal inputted to the phase comparing circuit, when the electric power supply is turned on. CONSTITUTION:A phase locking circuit 6 detects the fall edge of an output signal fN of a frequency dividing circuit 1, inputs the signal into a frequency dividing circuit resetting terminal of the frequency dividing circuit 5, thereby executes the initial resetting of the frequency dividing circuit and matches forcibly an output signal fM of the frequency dividing circuit 5 to the phase of fN. For a constant time after turning on the electric power source, a starting signal Vb is outputted by a starting circuit 7, only when the starting signal is generated, the above-mentioned resetting signal is inputted into the frequency dividing circuit 5, thereby the phase locking of fN and fM is forcibly executed. When the starting signal is vanished, the stationary PLL (phase locking loop) action is executed.
申请公布号 JPS61196619(A) 申请公布日期 1986.08.30
申请号 JP19850036328 申请日期 1985.02.27
申请人 HITACHI LTD 发明人 TANAKA HIROMICHI;NODA TSUTOMU;NISHIMURA KEIZO;AMADA NOBUTAKA
分类号 H03L7/18;H03L7/10;H03L7/199 主分类号 H03L7/18
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