发明名称 INSULATION GATE-TYPE NONVOLATILE SEMICONDUCTOR MEMORY
摘要 PURPOSE:To achieve higher integration by a method wherein a floating electrode is formed so as to come into contact with an insulation film covering the gate electrode of a selector transistor and pile up on the gate electrode of this transistor. CONSTITUTION:A gate insulation film 33 and an impurity diffusion layer 32b for a selector transistor are formed on a semiconductor substrate 31. Then, a gate insulation film 34 for a memory transistor and an insulation film 36a between the impurity diffusion layer 32b and a floating gate electrode are formed. After a tunnel gate insulation film 35 is formed, a floating gate electrode material film 40a is formed. After the patterning, an insulation film 37 between the insulation gate electrode-control gate electrode-control electrode is formed. Further, a control gate electrode material film 41a is formed. Then, the film 41a is patterned to form a control gate electrode 41. Then, the films 37, 40a, 34, and 36a are removed self-alignment with the control electrode pattern. and at this time, the film 40a is formed into a floating gate electrode 40.
申请公布号 JPS61194877(A) 申请公布日期 1986.08.29
申请号 JP19850035788 申请日期 1985.02.25
申请人 NEC CORP 发明人 KOYAMA MASASHI
分类号 H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L21/8247
代理机构 代理人
主权项
地址