| 摘要 |
PURPOSE:To obtain an instruction rewrite detection circuit in a little hardware quantity, by setting a store address to a prefetch range holding means, when a store into a prefetched instruction range is detected. CONSTITUTION:When the store to the prefetched instruction range is detected, when a store instruction is executed in a device to set the store address to the prefetch range holding means, the store address is set to a store address register 2. The contents of a register 2 are compared with the contents of the address buffers 3 and 4 by the address comparators 5 and 6. If the store address is between the buffers 3 and 4, the write to the fetched instruction to an instruc tion buffer is to be performed. If they are the contents of a content register 2 of the buffer 3 > contents of the buffer 4, an AND gate 9 generates an instruc tion rewrite detection signal, and sets an instruction rewrite detection flag 10. Further, the contents of the register 2 are set to the buffer 3. As well, by the setting of the instruction rewrite detection flag 10, the update after the buffer 3 is suppressed, and the new instruction fetch is also suppressed. |
