Address contention arbitrator for multi-port memories.

摘要

For detecting and resolving address contention between ports of a multi-port memory address signals (Aa0 - Aa(n-1)) arriving at a first port (A) are compared with delayed address signals (Ab0D - Ab(n-1)D) from a second port (B). If a match occurs, the second port (B) is given priority. Similarly address signals (Ab0 - Ab(n-1)) arriving at the second port (B) are compared with delayed address signals (Aa0D - Aa(n-1)D) arriving at the first port (A). If a match occurs in the comparison, the first port (A) is given priority.