| 摘要 |
PURPOSE:To eliminate the saving process of data to a memory area from another memory area and to increase the data input/output processing speed, by using both high-order and low-order addresses for temporary storage of data and reducing the speed difference of data transfer. CONSTITUTION:The pointer values of the output and input pointer registers 21 and 22 receive +1 from ADD circuits 23 and 24 every time the input/output processing of one word is through at a data buffer part 8. Then both registers 21 and 22 prepare for the next input/output actions. While a selection circuit 25 receives the low-order address signals (10 pits) of both registers 21 and 22 and selects a certain low-order address in response to a read or write mode of a microprocessor 4 and delivers it to the buffer part 8.
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